1. Field of the Invention
The present invention relates to a ferromagnetic random access memory (FeRAM), and for example, to a ferromagnetic random access memory having a structure in which cells each consisting of a ferromagnetic capacitor and a transistor connected together in parallel are connected together in series.
2. Description of the Related Art
A ferromagnetic random access memory so-called TC parallel unit series connected ferromagnetic random access memory is known. In this memory, cells each consisting of a ferromagnetic capacitor (C) and a transistor (T) connected together in parallel are connected together in series, as shown in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2003-297078. A structure in which a plurality of memory cells each consisting of a ferromagnetic capacitor (C) and a transistor (T) connected together in parallel are connected together in series will hereinafter be referred to as a block. One end of each block is connected to a bit line via a block selection transistor. The other end of the block is connected to a plate line.
Normally, cell transistors of all the memory cells are on, with no voltage applied across their capacitors. Further, the block selection transistors are off. When a write or read is executed, the cell transistor of a memory cell to be accessed is turned off. Further, the block selection transistor in the block including this memory cell is turned on. In this state, the plate line is driven (the potential of the plate line is raised) to apply a voltage across the capacitor of the memory cell to be accessed. A potential corresponding to the polarization state of the capacitor is generated in the bit line.